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Fix AVX-512 reduce_max/reduce_min missing bytes 32-39 for 8-bit types - #1431
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The avx512f kernels folded the upper 256 bits into the lower half with
_mm512_permutexvar_epi64 using indices {5, 6, 7, 8, ...}. The intrinsic
only uses the low 3 bits of each index, so 8 wraps to 0 and qword 4
(bytes 32-39) was never compared. An extremum located there was missed.
Take the max/min of the two 256-bit halves directly (lower_half /
upper_half) and continue with the AVX2 reduction. This also drops the
512-bit max whose upper half was discarded, and it extends the kernel to
16-bit types, which previously used the generic swizzle reduction (up to
4x slower with GCC).
Add a test that places the extremum at each position of every batch type.
Assisted-By: Claude Opus 5.5 <noreply@anthropic.com>
DiamonDinoia
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Oct 23, 2026
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I like this, the code is also simpler.
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The avx512f kernels folded the upper 256 bits into the lower half with _mm512_permutexvar_epi64 using indices {5, 6, 7, 8, ...}. The intrinsic only uses the low 3 bits of each index, so 8 wraps to 0 and qword 4 (bytes 32-39) was never compared. An extremum located there was missed.
Take the max/min of the two 256-bit halves directly (lower_half / upper_half) and continue with the AVX2 reduction. This also drops the 512-bit max whose upper half was discarded, and it extends the kernel to 16-bit types, which previously used the generic swizzle reduction (up to 4x slower with GCC).
Add a test that places the extremum at each position of every batch type.
Assisted-By: Claude Opus 5.5 noreply@anthropic.com
I found this issue via AI-review of my PR that uses xsimd. Instead of fixing the batch_constant indices I decided to use lower_half/upper_half functions since I thought it made the code more readable and understandable and not bug prone.